1. Field of the Invention
The present invention relates to a semiconductor apparatus and a method of the same. More particularly, the present invention relates to a semiconductor apparatus with a lid bonded on a wiring board and a method of manufacturing the same.
2. Description of Related Art
In the FCBGA (Flip Chip Ball Grid Array) semiconductor package, it is known that by covering a semiconductor chip mounted on a wiring board with a cover so-called “lid”, the semiconductor chip has contact with the lid through thermal conductive paste, thereby enabling the lid to function as a heat sink.
FIG. 1 is a sectional view showing a semiconductor package disclosed in Japanese Patent Publication JP-P 2000-311960A. In this semiconductor package, a semiconductor chip 120 is covered with a cover so-called “lid” 130. The lid 130 is bonded to the wiring board 110 only at an edge portion of the lid 130 (edge of the lid 130; outer frame portion having contact with the wiring board). To make the lid 130 function as a heat sink, thermal conductive past 122 is applied to a back surface of the semiconductor chip 120 after underfill (UF) resin 121 is thermally-cured. The lid 130 is bonded on the wiring board 110 as described below. First, an adhesive (lid adhesive resin) 123 is applied to the wiring board 110 in the form of a line. Next, the lid 130 is bonded at the edge of the lid 130 on a portion where the adhesive 123 is applied. Then, the adhesive 123 is thermally-cured.
In conjunction with the above description, Japanese Patent Publication No. JP-P 2001-110926A discloses a flip chip package. The object is to improve flatness of a wiring board and a lid by reducing stress applied to a semiconductor chip and bumps formed on the semiconductor chip.
The inventor has now discovered the following facts. In the related art, to bond the lid 130 and the wiring board 110, the edge portion of the lid 130 is used. Based on the inventor's consideration, to obtain superior adhesive strength between the lid 130 and the wiring board 110, it is required that the size of the edge portion of the lid 30 is greater than a certain level size. This becomes the barrier against miniaturizing of a semiconductor package.